Last update: 2000-06-16

MGA (Over)clocking

Introduction

Any contemporary graphics controller performs two basic functions: These two functions are so different that they are performed by two distinct and separate modules which - by accident - are integrated in single piece of silicon. The modules are referred to as sequencer and graphics processor or engine. What's more unfortunate - both modules must work with single block of memory, as the user expects the changes on the screen to be displayed on the monitor's screen. Thus the two parts must cooperate with the third block - memory controller, which lets them both access the screen memory in such way that the image is continuously displayed, and the programs running on the computer have chance to change it from time to time.

Components of graphics accelerator

Sequencer

Sequencer is a part of a graphics controller which is responsible for requesting data from video memory, sending the data to the display as pixel color values and generating the control signals needed by the display hardware. The sequencer is implemented as a cascade of counters and comparators. The counters count pixels and lines, and comparators decide when to finish or start sending pixels, blanking pulses and synchronization pulses (used to instruct the display to advance to the next line or next screen). The sequencer is synchronized (or "clocked") with so-called "pixel clock" - the signal of frequency equal to the frequency with which pixels are sent to the display device. All the other timing parameters (like widths of sync pulses) are expressed in terms of pixel clock. To operate, the sequencer must be fed with pixel clock signal (PClk). The frequency of this signal depends on the screen resolution and refresh rates (sync frequencies) and varies from approx. 25 to 250 MHz in most of contemporary computer displays. Some typical PClk frequencies are shown below.
 
H res. V res. V refresh [Hz] Pclk [MHz]  
640 480 60 25.175  VGA graphics mode
720 400 70 28.322 VGA text mode
800 600 85 56.25  
1024 768 85 94.5  
1280 1024 85 157.5  
1600 1200 85 229.5  

Graphics engine

The graphics engine is responsible for updating the contents of video memory. Contemporary graphics engines, like the one used in G200, are usually composed from two parts: drawing processor and "setup engine". The drawing processor is a set of adders, multipliers/shifters and comparators. Together these blocks create a very fast, specialized ALU (Arithmetic/Logic Unit) which is capable of very fast drawing of graphics primitives like lines, rectangles and triangles, filling them with variable color and painting them with the textures. Drawing processor is usually able to produce at least one new pixel in every cycle, so while drawing it continuously wants to access the video memory.

Setup engine is the most secret part of every graphics accelerator. Not much can be said about it. Usually it is a simple, very fast fixed point/floating point processor with its own instruction set. It is able to perform fast computations on vertex parameters and to pass the results to the drawing processor. Matrox chis prior to G200 didn't contain any setup circuitry. Matrox uses the name WARP to designate the setup processor. G200 has one WARP, G400 - two, G450 is believed to contain at least two WARPs.

The clock speed of graphics engine doesn't depend on the current graphics mode. It is not necesary to change the graphics engine clock while changing pixel clock.

Memory controller

The memory controller performs the video memory accesses requested by the sequencer and graphics engine. Because there are two sources of requests and both may wish to access a new pixel on every cycle, the memory interface should be faster than each of these units.

In contemporary graphics accelerators the memory controller works synchronously to the graphics engine. Its clock speed is not necessarily equal to the graphics engine clock (it should be faster in general), but its clock is usually obtained from the same source as the graphics engine clock.

MGA family clocking scheme

The scheme of clock generation is common to all the Matrox MGA family graphics controllers. All the newest chips (G-series) share the overall structure with the original Mystique (MGA 1064SG).

PLL operation

There are two PLL oscillators in the MGA chip (this doesn't count the second head circuitry on G450). PLLs are the circuits capable of generating the fixed frequency signal. The PLL output frequency is computed by multiplying and dividing some base frequency by integer coefficients. In MGA implementation, the PLLs are controlled by three values contained in MGA chip control registers. These values are called M, N and P, and the formula looks as follows:

fout = fref * (N+1) / ((M+1)*(P+1))

Both PLLs are fed with the same reference frequency, obtained from external crystal oscillator. In older cards the frequency was usually 14.318 MHz; in G-series based cards 27.000 MHz oscillator is used. The frequency of oscillator installed on the card is coded in PInS.

Pixel clock generation

One of the PLLs is used to generate the pixel clock (PCLK), used by the sequencer. There are three sets of M, N and P registers associated with the PCLK PLL. It is possible to change PCLK frequency by simply selecting the current set. The first two sets of control values are used for PCLK in two VGA-compatible clocking modes. These two sets are programmed during board initialization, and their frequencies are obtained from PInS. The standard frequencies used with VGA monitors are 25.175 and 28.322 MHz. It is possible to instruct the BIOS to program them with any frequency up to 63.5 MHz.

The third set of values is used in all the modes other than standard VGA ones. This includes all the graphics modes under Windows, and all VESA modes. So while the first two sets are usually not touched after init, the third set is reprogrammed on every resolution switch.

System clock generation

The second PLL is used to obtain the system clock (SCLK). SCLK in turn is used to generate all the clocks needed by the MGA chip other than PCLK. As SCLK frequency is switched very rarely, there is only one set of M, N and P registers.

Clocks derived from SCLK

Three clock signals are derived from SCLK: These clocks are obtained by dividing the frequency of SCLK by one of few possible values. In older chips (before G-series), SCLK was divided by either 2 or 3. In G100/200, the possible divisors are 2, 1.5 and 1; G400 has huge set of strange divisors. Each clock signal has its own divisors, so the frequencies of clock signals may be different.

Clock programming by Matrox

PCLK

During initialization, the BIOS programs two sets of PLL control registers for two VGA modes. It doesn't touch the third set, as it is used only in non-VGA modes. While using VGA modes one of these two sets is selected, depending on the mode. When VESA BIOS or Windows switches to any non-VGA mode, the third set is used, and during mode switch it is programmed to produce the proper pixel clock.

To prevent the BIOS and Windows from setting too high PCLK frequency, PCLK frequency limits are stored in PINS structure in BIOS image. There are five fields in PINS which influence the PCLK (numbers according to Matrox PROGBIOS):
 
Label Meaning Value Remarks
 10 max PLL freq. <freq. in MHz> - 100  
 11 max. PCLK freq, 8bpp <freq. in MHz> - 100  
 12 max. PCLK freq, 16bpp <freq. in MHz> - 100  
 13 max. PCLK freq, 24bpp <freq. in MHz> - 100  
 14 max. PCLK freq, 32bpp <freq. in MHz> - 100  

 

 SCLK

SCLK PLL is programmed during BIOS initialization based on current card configuration and data stored in PINS. SCLK frequency is not stored in PInS directly - PInS contain GCLK frequency and all the dividers (for MCLK, GCLK and WCLK). Based on GCLK freq. and GCLK divider, the BIOS calculates and programs SCLK frequency. The same is done by PowerDesk Windows driver.
 

up to G200

There are two sets of clocking data in PINS. The first set (and the only one present in older cards, up to G100) is used by all BIOS modes and in Windows modes that don't allow for 3D acceleration. This set is referred to as "2D". The second set is called "3D", and is used by PowerDesk in Windows only for the modes that support 3D acceleration.

"2D" modes include:

"3D" modes are 8, 16 and 32 bpp modes that may fit at least 2 frame buffers and 16-bit Z buffer in video memory.

Each data set contains base GCLK frequency, clock dividers and information on reducing the frequency when the memory expansion module is installed. Because the added module negatively influences the electrical characteristcs of memory interface, the MCLK (and thus all the other clocks) must be reduced for stable operation with added memory. This information is coded very differently for "2D" and "3D" modes.

The "2D" set is compatible with older cards (like Millennium and Mystique). It provides the clocking info for base board and 3 sizes of memory expansion modules: 2 MB, 4 MB and 8 MB. There are 5 GCLK values stored in PINS: GCLK for VGA modes and 4 values of GCLK used without memory module and with three possible sizes of memory modules. These values are stored as clock frequencies expressed in MHz, and they are labeled as 17..21 in G200 PINS.

The "3D" set contains the GCLK value for base board, the complete set of clock divisors and clock reduction factor expressed in MHz per added memory size. Base GCLK is stored in PINS at label "31:" as frequency in MHz.

G400

G400 clocking info is slightly different. The PInS structure is bigger and contains more information.
The "global" section of PInS contains maximum allowed SCLK value and PCLK values for various modes.
There are three clocking data sets - VGA, 2D and 3D. The last one is the only one that really matters, since we mostly use the accelerated modes (16- and 32bpp). Every set contains the SCLK and GCLK frequency, divisor information and Memory Control Word, used to program the memory controller on G400 chip.

Please, don't ask me for more details (divisors and reduction factors). You know, I like Matrox, Matrox appears to like me and I am happy with this.

Default clock settings

G200 boards

Various models and versions of G200 boards may have slightly different clock parameters programmed by Matrox. They are summarized below:
 
Parameter  2D 3D
GCLK 62..72 79..90
GCLK div 2 2
SCLK 124..144 158..180
MCLK div 1 1.5
MCLK 124..144 105..120
WCLK div not used  2
WCLK   79..90
GCLK reduction none 0, 4 or 8 MHz per 8 MB

G400 boards

There are two main lines of G400-based boards: "normal" and "Max". Max boards use faster, 5ns memory ("normal" normally use 6ns, but there are some with 5ns chips. The G400 chip on Max is tested to operate at up to 360 MHz SCLK and PCLK, 150 MHz GCLK/WCLK and 200MHz MCLK. It is cooled by smal heatsink and fan. Non-Maxes are guaranteed to operate at 300/124/166 respectively and are equipped with a bigger heatsink without fan.The PInS contains clock values appropriate for a given card. Of course Max is clocked at higher frequencies and has higher SCLK/PCLK limits than nonMax.

MXINFO utility shows most of the clocking info coded in PInS.

Overclocking the MGA board

The parameters specified by Matrox in the board's PINS are safe; they guarantee the proper operation under any manufacturer-specified conditions. Of course the board may operate at higher frequency than recommended by Matrox. Of course Matrox does not guarantee that the board will operate at any frequency higher than the original one. If you already know that overclocking may be the source of many problems and still want to do this, go ahead.

Dangers

The possible dangers include overall instability, display errors and (the worst case) physical destruction of MGA chip due to overheating. The last situation is very unlikely - the chip will usually stop responding before it turns into a silicon cake, but it cannot be totally excluded.

Also, you will loose all warranties as soon as someone figures out that the board was operated outside of its specified parameters.

If you still want to try your chances, read ahead.

"Safe" overclocking

Virtually all devices may be safely operated at 10..15% above their frequency limits, so it is quite safe to overclock the MGA chip and its memory by this margin. Note that in 2D modes memory operates at higher frequency than in 3D modes, and there is no reason for not running the memory at "2D" frequency in 3D mode. You may safely change the GCLK in 3D mode to something about 92..95 MHz. This will yield MCLK of the same frequency as the one used in 2D mode, and the graphics engine will be quite happy when operated at 10 % above its nominal frequency.

Cooling

For G400 boards, which have lower "margins", we have to put some attention to proper cooling. Just follow Matrox - they definitely knew what they did when they put the fan on Max board... Before you attempt to overclock the nonMax G400, first find an old (or new) CPU fan, and attach it permanently to the heatsink of G400 chip. 486-size fan is perfect. Pentium size is slightly too big, but 2 screws and rubber band will make it sit correctly on the heat sink. Be careful with screws - it might be a good idea to bens some heatsink parts to make them fit tight. Otherwise they may drop and electrically destroy your motherboard.

Monitoring the current clocking parms

The current clocking parameters may be monitored under Windows 9x using the MXCK utility. MXCK shows all the clock frequencies, PLL values and divisors currently programmed in the MGA chip. Of course the other utilities, like MOC or Matrox own overclocker will do almost the same.

Overclocking the RAMDAC

The PCLK (RAMDAC) frequency limits are in effect only in very high resolution modes, above 1600x1200. Remember that the actual frequency of RAMDAC is determined by the current resolution, so "overclocking" the RAMDAC effectively means allowing it to operate at higher frequency in very high resolutions. You may gain something, namely screen refresh rate, only if you have a good and expensive monitor working above 1600x1200. You may also loose something, namely image quality (pixel sharpness). The only way to "overclock" the RAMDAC is to change the limits in PINS.
If you want to know more about RAMDAC's operation, look up this article.
I think that the only practical trick is to slightly increase RAMDAC speed limits for 24 bpp and 32 bpp modes, to get higher refresh rates at high resolutions (note that the refresh rates at 1280x1024 and above in 24/32 bpp are limited by RAMDAC limits AND memory bandwidth). Be warned that higher refresh rates at high resolutions reduce the 3D performance.

Overclocking with MXSET

MXSET is a command-line driven, DOS-based utility which works flawlessly under Windows 9x. It allows for the programming of all the PLLs, clock divisors and RAM refresh counter. Please read the MXSET description for more details.

Overclocking with MOC&MYSTCLK

This is not a complete guide, just some remarks.

Overclocking from PINS

<No G400 information included yet, please be patient>
Once you determine that your card is stable at some frequency (using MOC or Powerstrip), you may make the changes permanent by reprogramming the PINS. This way no overclocking utilities will be needed, and the board will be overclocked under any operating system, as long as the driver follows the PowerDesk's scheme for programming the clocks (not-quite true for xFree so far).

Remember that by altering the PINS you may make the board unusable and reverting the changes requires BIOS reprogramming as in BIOS recovery routine. Also, Matrox will have a good reason to void your warranty.

To overclock the card by PINS modification:

  1. Dump the current PINS using MXINFO or PROGBIOS and save it under some recognizable name.
  2. Make a second copy of PINS that will be used for overclocking.
  3. Make the changes in the new PINS file.
  4. Program the new PINS using "PROGBIOS -i auto -s newpins.txt". (DON'T DO IT UNDER WINDOWS!!!).
To make the routine safe and easily reversible, do not change any VGA mode parameters. This way you will always be able to boot in DOS mode and revert the changes influencing the 3D modes. You don't really need to overclock any other modes anyway...

Altering the PInS - G200

 Change fields 10..14 for RAMDAC limits, 17..21 for 2D clocks and 31 for 3D clocks. A quick and safe change is to set only field 31 to the value of 90..93.

Altering the PInS - G400

If you want to increase the SCLK above your card's factory limits, first change the SCLK limit. The value coded in PInS is actually 1/4 of the real one, so "75" means 300 and "90" means 360.
To change the SCLK and GCLK for 3D modes, edit the fields......(soon)
Also, if you want to overclock the nonMax to near-Max values, start with changing the memory control word at location 81. .....(soon)